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Forth on Nandland Go Board

After a recent excursion into FPGAs, and in particular Z80 + CP/M emulation, I’ve been tracking developments and keeping tabs on what’s being going on in both FPGA- and Retrocomputing-land. FPGAs are...

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Convolution, anyone?

Right now, the JeeLabs Energy Monitor only tracks and reports three mains pulse counters here at JeeLabs. The smart meter’s P1 serial data source will be added soon, but there have been issues with...

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Keeping track of time

One of the things I’d love to do is measure the AC mains grid frequency with fairly high precision. We know that it’s kept at 50 Hz long term, so that old mains-powered alarm clocks, etc. can keep...

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Mecrisp on other platforms

We’ve already seen that Mecrisp Forth is also available for the Nandland Go Board FPGA board. But Mecrisp Forth can in fact be used on several other platforms. For one, there’s the MSP430 version...

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Scandinavia by rail

It will not have been obvious from this weblog, since new posts are now automatically published each Wednesday at midnight, but these past few weeks I’ve been on vacation, travelling across Germany,...

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The disconnected life

On those recent travels across Scandinavia, I had a chance to reset my expectations of what life is like when not “attached to internet” all the time. Quite unlike what I’d imagined, I can tell you....

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TFoC: FPGA & Forth = VGA

(This article is part of the The Fabric of Computing series: in search of simplicity) Here is a fun project, created from start to finish by Matthias Koch, as part of his Mecrisp implementation of...

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CPLDs and FPGAs

It’s vacation time - I’m having fun doodling with logic devices and gate arrays… have been messing about with them before, when duplicating Grant Searle’s neat Z80 setup. This time I want to write some...

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VGA in Verilog

Verilog is a Hardware Description Language - you can “write” logic circuits in it. It’s very intriguing due to its built-in parallelism and the way an actual circuit can be inferred from a high-level...

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Sweep, staircase, and blanking

We’ve all seen images like this before: Well, maybe not consciously, but this is the way images are “painted” across the screen of a CRT in old TVs. A sweep from left to right, combined with a...

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PMOD connectors

Last week’s post used the 12-pin “Pmod” connector on my FPGA board to generate the X, Y, and Z signals. Pmod™ is a simple header pinout standard (PDF) defined by Digilent. There’s a (free) license for...

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Let's build (half a) UART

The problem with FPGAs is that they’re so low-level. It’s a bit like sitting on the floor with a huge pile of 7400 series chips, trying to make them do something … u s e f u l ? When starting from...

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I never had an Intel 8080

… although I spent months tinkering with a Z80 chip in a previous life - long, long ago. But with an FPGA, that can change, at least in the virtual sense: there are several “soft cores” implementing an...

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Running a simulated FPGA

Who needs real hardware? One of the very nice things you can do with Verilog (and VHDL), is to use it as basis for a simulator. Especially with synchronous designs, which do all their work in lock-step...

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Diving deep into SPI

As a somewhat more substantial exercise to learn Verilog, I thought I’d write an SPI master controller - should be easy, right? The Serial Peripheral Interface bus can deal with high speeds (at short...

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TFoC - PDP-8 in 256 lines of C

Always in search of the essential “fabric” of computing, I decided to create yet another PDP-8 emulator. In plain C, and in as few lines of code as possible - without resorting to obfuscated C. It...

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STM32F103 emulating a PDP-8

Note: these weblog posts now appear at a leasurely once-a-week pace. Although the summer vacation time is now over, I have decided to stick to this schedule for a while: more time to think and prepare...

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PDP-8/L & DF32 disk on FPGA

As final entry in this PDP-8 saga (for now), I’d like to present an FPGA implementation of a small but very functional setup by Ian Schofield of a PDP-8/L with serial console and a whopping 32-kiloword...

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Debugging an FPGA via a µC

When trying out things in Verilog, one of the struggles I have is understanding what my “noob” code is doing. There’s no such thing as a printf here, obviously. There’s simulation, but that only goes...

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Composite video from ARM

Some weblog posts tend to take me further away from the usual topics. No worries… it’s just that I want to explore some “outer edges” to better understand complexity & speed trade-offs between µCs...

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